/**************************************************
versys eda example--**** dff.h ****----------------
----Header file of DFF with synchronized reset-----
Copyright (c) 1996-2007, by all Contributions. 
All rights reserved.
*******************2007/11/22 by ogu, lexim,inc.***/

SC_MODULE(dffr)
{
	sc_in<bool>		clock;
	sc_in<bool>		reset;
	sc_in<bool>		din;
	sc_out<bool>	dout;
	
	void do_ffr();

	SC_CTOR(dffr)
	{
		SC_METHOD(do_ffr);
		sensitive_pos(clock);
	}
};